2nd World Congress and Expo on Nanotechnology and Material Science April 04-06, 2016 at Dubai, UAE
Conference Proceedings

Oral Use of Nanoparticles and Nanoplatelets in Low-Power Non-volatile Charge Trapping Memory Devices

Ammar Nayfeh
Institute Center for Microsystems – iMicro, Department of Electrical Engineering and Computer Science (EECS), Masdar Institute of Science and Technology Abu Dhabi
Nazek El-Atab
Institute Center for Microsystems – iMicro, Department of Electrical Engineering and Computer Science (EECS), Masdar Institute of Science and Technology Abu Dhabi

Published 2018-01-01


Recently, one of the main developments and application of FLASH memory is flexible, low-cost and reliable solid statememory, such as removable memory, non-volatile memory for portable electronics and solid-state hard drive. For the nextgenerationelectronics, the research of non-volatile memory focus on fast programming/erasing and low-power applications forexcellent portable electronics and extremely long battery life [1]. It has been reported that it is possible to reduce the operatingvoltage of silicon-oxide-nitride-oxide-silicon memory devices from 10 V down to 4 V by reducing the tunnel oxide thickness,however, the retention characteristic of the memory will be reduced from 10 years down to a couple of seconds [2]. Therefore,the investigation of novel materials to be incorporated within current non-volatile memory devices is crucial. In this work, Siand InN nanoparticles, and graphene nanoplatelets are studied as the charge trapping layers of charge trapping memory devices[3-6].The active layers of the memory devices were deposited using Atomic Layer Deposition, and the nanoparticles were spincoated on the samples. Electrical measurements such as I-V and high-frequency C-V measurements are conducted on thesamples in order to study the effect of embedding the nanoparticles/nanoplatelets in the memory cells. The results show thatlarge memory windows can be obtained due to the large charge trapping density of the nanoparticles/nanoplatelets. In addition,the measured retention characteristics are excellent which is due to the large band offset between the nanoparticles and tunneloxide which exponentially reduce the leakage current. Moreover, using nanoparticles within the charge trapping layer allows forreducing the tunnel oxide thickness without degrading the retention characteristic of the memory.Furthermore, smaller Si nanoparticles (2-nm average size) showed hole storage while larger nanoparticles (2.85-nm) showedmixed charge storage. This is due to the smaller electron affinity of the smaller nanoparticles which reduces the conductionband offset with the tunnel oxide and therefore may inhibit electron storage. On the other hand, InN and graphene have verylarge electron affinities and pure electron storage is observed. In fact, the use of nanoparticles with high electron affinity willenable a memory fully programmed and erased using pure electrons instead of mixed charges which would increase the speedof the write and erase speeds of the cells.Finally, the charge emission mechanism from Si channel to the nanoparticles through the tunnel oxide is studied for thedifferent samples. The memory with 2-nm Si nanoparticles allowed a large memory window at low operating voltages due toPoole-Frenkel hole emission mechanism, while Phonon-Assisted Tunneling and Fowler-Nordheim Tunneling require higherelectric fields across the tunnel oxide and therefore higher operating voltages are needed as in the case of the memory cells withInN and graphene nanoplatelets.